FPL2012 Pre- and Post Tutorials and Workshops

FPL is surrounded by several tutorials and workshops targeting hot topics, projects or tools. These events are organized by academic individuals or industrial sponsors.
Except for the full day SRCS Workshop, all other events on this website are free of charge.

FPL2012 Workshop and Tutorial Program

Monday Aug. 27th

9:00 Xilinx Workshop: Embedded System Design Flow using Zynq (Room Assembler 3417)

Tuesday Aug. 28th

9:00 Xilinx Workshop: Embedded System Design Flow using Zynq (Room Assembler 3417)
9:30-16:30 Using Altera Tools and Boards for Embedded System Design Courses (Room Cobol 3452)
10:00-13:30 ReconOS/ANA Tutorial (Robin Meeting 4409)
14:00-18:00 New tools for teaching VHDL with Sigasi Pro for VHDL
17:00-18:30 Conference Registration

Saturday Sep. 1st

9:00-13:00 Tutorial on Partial Reconfiguration using GoAhead (Room Lisp 2428)
9:00-17:30 Workshop on Self-Awareness in Reconfigurable Computing Systems (Room Logo 2438)
13:00-18:00 Workshop on Neuromorphing and Neural Engineering Using FPGAs (Room Java 2423)

Industrial Tutorials & Workshops    Academic Tutorials & Workshops    top

Academic Tutorials & Workshops

  • ReconOS/ANA Tutorial (Robin Meeting 4409)
    Tuesday Aug. 28, 2012, 10:00-13:30
    , (free of charge) registration by mail to markus.happe@upb.de
  • The tutorial introduces ReconOS, a multihreaded progamming model and execution environment for reconfigurable hardware. With ReconOS, you can model a concurrent application for reconfigurable systems-on-chip using both software and hardware threads. The tutorial includes a demonstration of the ReconOS tool flow, the simulation environment (for debugging hardware threads) and a first case study.
  • Tutorial on Partial Reconfiguration using GoAhead (Room Lisp 2428)
    Sat. Sep. 1, 2012, 9:00-13:00
    , (free of charge) registration by mail to koch@ifi.uio.no
  • The new tool GoAhead, developed at the University of Oslo, provides several distinguished features for implementing run-time reconfigurable systems that are not available in the Xilinx vendor tools. In this tutorial, GoAheads' powerful but yet easy-to-use features will be presented from a practical point of view combined with lots of background information. The format of the tutorial is a lecture followed by a hands-on lab (on the Atlys Spartan-6 board).
  • Workshop on Neuromorphing and Neural Engineering Using FPGAs (Room Java 2423)
    Sat. Sep. 1, 2012, 13:00-18:00;
    Website and CFP
  • The aim of this workshop is to bring together researchers working on neural engineering who utilize FPGAs, with the goal of providing an opportunity to discuss new ideas, present solutions to neural challenges and to develop proposals for future work. more details
  • Workshop on Self-Awareness in Reconfigurable Computing Systems (SRCS) (Room Logo 2438)
    Sat. Sep. 1, 2012, 9:00-17:30;
    Website and CFP
  • Self-awareness is an emerging field of research in computer science and the objective of this workshop is to bring together researchers who are active in this field, present their current work, and share their concepts and visions of self-aware systems. The workshop program will consist of talks and poster presentations and will also provide sufficient time for group discussions between attendees.
Industrial Tutorials & Workshops    Academic Tutorials & Workshops    top

Industrial Tutorials & Workshops

  • Xilinx Workshop: Embedded System Design Flow using Zynq (Room Assembler 3417)
    Mo. & Tue. Aug. 27-28. 2012,
    Instructor: Parimal Patel (registration link)
  • This course provides professors with an introduction into embedded system design using ZedBoard evaluation and development board, and Xilinx Embedded Development Kit (EDK). System simulation verification is also covered. more details
  • Using Altera Tools and Boards for Embedded System Design Courses (Room Cobol 3452)
    Tue. Aug. 28. 2012,
    Instructor: Tom Czajkowski (registration by mail to tczajkow@altera.com)
  • This course begins with an short introduction to Altera and the FPGA technology, followed by two practical sections in which participants get hands-on instruction on how to use Quartus II and other Altera tools. The first section deals with basic digital logic design, where we show how to use Quartus II to design simple logic circuits and program them onto the Altera DE1 boards (provided for the purposes of the course). more details

     

Research Council of Norway logo City of Oslo logo  Microsemi logo  Xilinx logo  Altera logo Silica logo Sigasi logo Maxeler logo Synective logo CSIR logo Tabula logo CosReCos logo